Differential device using charge transfer devices, a filter and delay line comprising this device

ABSTRACT

A differential charge-transfer device for transversal filtering or delay line applications. It comprises: two charge-transfer channels which respectively receive the two signals, the difference between which is to be formed; an electrode common to both channels; means for sampling the signals in each channel, this sampling taking place at the same instants in both channels; a set of electrodes in each channel which, on the application of potentials of period T, propagate the samples to the common electrode with a relative delay equal to T/2 from one channel to the other. The signal representing the difference between the input signals is extracted at the common electrode.

This invention relates to the use of CTD, i.e. Charge Transfer Devices, for forming a differential stage. The invention also relates to the use of such a CTD differential stage for the production of charge-transfer filters and delay lines.

Some of CTD require a differential stage, as is the case for example with the output stage of so-called transversal filters. This output stage is normally formed by means of an external differential amplifier or even by means of MOS-transistors integrated on the same substrate as the filter itself. However, these constructions are attended by various drawbacks, including their bulkiness in the case of an external differential amplifier, or their high power consumption, in the case of a MOS-output stage, the power consumption of MOS-transistors being very much greater than that of CTD, and the non-linearities introduced by the MOS-transistors.

In order to obviate these drawbacks, it has been proposed to form the differential stage by means of the charge-transfer technique. In particular, it is known from U.S. Pat. No. 4,123,733 to THOMSON-CSF that the differential output stage of a filter can be integrated in the filter by connecting two phase-opposed filters in parallel. The drawbacks of this solution are primarily its bulkiness (it requires two identical filters) and its special nature: it is not possible in this structure to isolate a differential stage usable in another charge-transfer device.

The present invention relates to a differential charge-transfer device which does not have any of these drawbacks and which may be used for various applications.

According to the invention, there is provided a differential device using charge-transfer devices for forming the difference between two electrical input signals, comprising:

a semi-conductor substrate in which electrical charges are capable of being transferred;

at least two electrically insulated channels formed in said substrate which respectively receive said two input signals;

first means for forming at the same instants in each of the channels groups of electrical charges representing samples of said input signals;

at least one electrode common to said two channels;

second means comprising transfer electrodes deposited on said substrate substantially parallel to one another, to which are applied periodic charge-transfer signals (φ₁, φ₂) controlling said transfer of charges, said second means propagating said groups of charges in each of said channels towards said common electrode with a relative delay from one channel to the other equal to half the period (T/2) of said charge-transfer signals;

means for extracting from said common electrode an output signal which is proportional to the difference between the two input signals.

For a better understanding of the invention and to show how it can be carried into effect, reference will be made to the following description in conjonction with the accompanying drawings, wherein:

FIG. 1 is a plan view of one embodiment of the differential device according to the invention;

FIG. 2a to 2f are diagrams explaining the operation of the device shown in FIG. 1;

FIGS. 3a to 3e are diagrams of signals capable of being applied to the device shown in FIG. 1;

FIG. 4 shows an embodiment of an element of the device shown in FIG. 1;

FIG. 5 shows a first application of the device according to the invention to a transversal charge-transfer filter;

FIG. 6 shows a second application of the device according to the invention to a transversal charge-transfer filter;

FIG. 7 illustrates another application, in this case to a filter having coefficients of very low value;

FIG. 8 shows an application of the filter according to the invention to the correction of the output signal of a charge-transfer delay line;

FIG. 9 is a variant embodiment of the preceding figure.

In these various figures, the same references denote the same elements.

FIG. 1 is a plan view of the device according to the invention.

Like any known charge-transfer device, it is formed by a semi-conductor substrate (for example of silicon) coated with an insulating layer (for example of silicon oxide) denoted by the reference 3. The semi-conductor substrate is formed with two electrically insulated and substantially parallel channels 1 and 2 in which electrical charges can be longitudinally transferred. These channels may be insulated by any known means, in particular by an increase in the thickness of the insulating layer or by a local increase in the doping of the substrate.

The device further comprises electrodes deposited on the insulating layer substantially normally to the direction in which the charges are transferred in the channels 1 and 2.

In this embodiment, the channel 1 successively carries: a diode D₁₁ ; electrodes G_(EC1), G_(E1), 11, 12, G_(T), G_(L), 13 and 14 and a diode D₁₂. The channel 2 successively comprises a diode D₂₁ ; electrodes G_(EC2), G_(E2), 21, 22, 23, 24, G_(T) and G_(L) common to the two channels 25 and 26 and a diode D₂₂.

The various diodes are for example P-N junctions formed by doping the substrate. The diodes D₁₁ and D₂₁ are used for injecting the signals (E₁ and E₂), between which the difference is to be generated, into the channels 1 and 2, respectively. The diodes D₁₂ and D₂₂ are connected to a biassing potential V_(DD) and are used for removing the charges at the end of their path.

FIG. 2a is a section through the device shown in FIG. 1 taken along the channel 1 in the propagation direction of the electrical charges. This section shows the semi-conductor substrate (4) covered by the insulating layer (5). The substrate 4 is formed with two zones opposite in conductivity to the substrate which, with the substrate, form the diodes D₁₁ and D₁₂. The substrate is brought to the most negative potential of the device which represents the reference potential (earth) in relation to which the other potentials are expressed.

It should also be noted that, throughout the description, the semi-conductor substrate is of P-type conductivity and that the charges transferred are minority carriers (electrons). It is obvious that, in the case of an N-type substrate where it is these holes which move, it is sufficient to reverse the polarity of all the potentials applied.

It can be seen from FIG. 2 that the electrodes G_(E1), 12, G_(L) and 14 are deposited on the insulating layer 5 whilst the electrodes G_(EC1), 11, G_(T) and 13 are deposited on a thickened part 6 of the insulating layer. The same applies to the channel 2 where one electrode of two is deposited on a thickened part of the insulating layer, beginning with the electrode G_(EC2). As already known, this arrangement has a two-fold function; on the one hand to ensure the continuity of the potential wells created in the semi-conductor 4 and, on the other hand, to impose a single transfer direction for the charge-carriers. This structure comprising an increase in the thickness of the insulating layer could be replaced by an increase in the doping of the substrate by ion implantation which performs the same functions.

The diagrams of FIG. 3 show the signals capable of being applied to the device illustrated in FIG. 1 as a function of time.

Diagram (a) shows a potential φ₁ applied to the electrodes 11, 12, 13, 14, 21 and 22. It is a square function of period T, its amplitude varying between φ_(1B) (lower level) and φ_(1H) (upper level).

Diagram (b) shows a potential φ₂ applied to the electrodes 23, 24, 25 and 26. It is also a square function and its amplitude varies between φ_(2B) (lower level) and φ_(2H) (upper level). It is preferably identical with φ₁, but phase-shifted by T/2 in relation thereto.

Diagram (c) shows a potential φ_(ECH2) applied to the electrodes (or gates) G_(EC1) and G_(EC2). The signal in question is a rectangular signal varying between φ_(H) and φ_(B) which has the same period T as the preceding signals but for which the duration of the lower level (φ_(ECH2) = φ_(B)) is greater than T/2. In addition, the front of φ_(ECH2) is delayed in relation with the front of φ₂ by a duration of less than T/4.

Diagram (d) shows a potential φhd ECH1 in the form of a square signal which has substantially the same form as φECH2 but is phase-shifted by T/2 in relation thereto.

Diagram (e) shows a square potential φ_(P) the amplitude of which varies between φ_(PH) and φ_(PB) with a period T and the front of which is preferably located between the back front of φ_(ECH1) and the back front of φ₁.

The potentials φ_(ECH1) and φ_(P) are applied to an element L connected to the electrode G₂. This element reads the quantity of charges existing under the electrode G_(L) during the upper level (φ_(H)) of φ_(ECH1) and fixes the potential of this same electrode at the value φ_(PH) before the reading phase.

One embodiment of an element such as this is shown in FIG. 4. It comprises at least two transistors T_(P) and T_(E), for example of the enhanced MOS-type, which are connected as follows: one terminal of T_(P) is connected to one terminal of T_(E) and to the gate G_(L) ; the second terminal of T_(P) is connected to a constant potential V_(P) and the gate of T_(P) is connected to φ_(P) ; the gate of T_(E) is connected to φ_(ECH1). The second terminal of T_(E) is preferably connected to the gate of a third transistor T_(S), for example of the enhanced MOS-type; one terminal of T_(S) is connected to a constant potential of relatively high value (V_(DD)); the second terminal of T_(S) supplies the reading signal S and is connected to earth through a resistive element which may be formed for example by a MOS depletion transistor T_(R) : one terminal of T_(R) is connected to T_(S), the other terminal of T_(R) and its gate being connected to earth.

In order to make the operation of the device clearer, FIG. 2a shows the state of the potential well generated in the substrate 4 by the application of different signals at an instant t_(o).

Under the diode D₁₁, the application of the signal E₁ corresponds to a potential level illustrated in the figure by a line 30. At the instant t_(o), illustrated in the diagrams of FIG. 3, φ_(ECH2) =φ_(B) at the gate G_(EC1) (line 31) which prevents charges from being transferred in the rest of the channel.

Diagram (b) of FIG. 2 shows only the interface 45 of the substrate 4 with the insulating layer 5 and the state of the potential well at a later instant t₁. At the gate G_(EC1), the potential φ_(ECH2) has passed to the value φ_(H) (line 32). In addition, the gate G_(E1) is kept at a potential V_(E) which corresponds to a potential level 33 in the figure. The potential V_(E) may be constant or periodic, but must always be greater than the input signal E₁ when it is injected, i.e. when φ_(ECH2) =φ_(H). At the instant t₁, when the potential φ₁ applied to the electrode 11 is still at the level φ_(1B) (line 34), thus preventing the charges from being transferred in the rest of the channel, the level of the charges remaining (line 30) below the only electrodes G_(EC1) and G_(E1).

Diagram (c) represents the instant t₂ : the potential φ₁ at the electrode 11 is still at the level φ_(1B) (line 34), but the potential φ_(ECH2) at the electrode G_(EC1) has returned to the level φ_(B) (line 31), thus isolating below the electrode G_(E1) a quantity of charges A defined by the difference between the potential V_(E) and the signal E₁ at the instant t₁, i.e. representing a sample of the signal E₁ at the instant t₁.

Diagram (d) shows the transfer of the sample A below the electrode 12: at the instant t₃, the potential φ₁ passes to the level φ_(1H), thus inducing two different levels 35 and 36 below the electrodes 11 and 12, due to the fact that the electrode 11 is deposited on a thickened part of the insulating layer (6). However, the sample A cannot pass beyond the electrode 12 because of the gate G_(T) which is kept at a constant potential V_(G) (line 37 in the diagram).

At a later instant t₄, before the signal φ₁ has 25 returned to the level φ_(1B) in a step not shown in FIG. 2, the signal φ_(P) passes to the level φ_(PH) whereas φ_(ECH1) is at the lower level (φ_(B)) (see FIG. 3). The effect of this is to fix the potential of the electrode G_(L) at a level V_(P) by the action of the transistor T_(P) shown in FIG. 4.

Diagram 2e shows the transfer of the sample A below the electrode G_(L) at an instant t₅, the electrode G_(L) still being kept at the potential V_(P) (line 39). This transfer is allowed by the return of φ₁ to the level φ_(1B) on the electrodes 12 and 13 surrounding the gate G_(L). At the same time a second sample (B) begins to be formed in a phase similar to phase (b) at the instant t₁ for the sample A.

Diagram 2f represents the step in which the quantity (A) of charges existing below the gate G_(L) is read at an instant t₆.

Since the potential φ₁ passes to the level φ_(1H), the charges in the channel 1 are removed towards the diode D₁₂ whereas, in the channel 2, the charges arrive below the electrode G_(L). This is because the channel 2 comprises one pair of electrodes more than the channel 1 between the electrodes 21 and 22 and the gate G_(T), controlled by the potential φ₂. Because the potential of the gate G_(L) has floated since φ_(P) =φ_(PB) (instant t₆), it is thus fixed at a value proportional to the difference between the quantity of charges which arrives (channel 2) and the quantity of charges which leaves (channel 1). The potential φ_(ECH1) enables the information to be extracted at this instant from the sampling MOS T_(E). In addition, so far as the sample B is concerned, the instant t₆ corresponds to the instant t₃ for the sample A.

At the following instant, the charges in the channel 2 (sample B) are removed by the potential φ₂ and a new group of charges arrive below G_(L) through the channel 1.

In the device described above, the value of the amplitude φ_(1H) has to be large in relation to the value of the potential V_(P) applied to the gate G_(L) to enable all the charges to be evacuated at the instant t₆. This may be achieved by regulating V_(P).

However, two variants are possible which eliminate the need for a large relative value between φ_(1H) and V_(P) :

the first consists in providing a conductive diffusion between the gate G_(L) and the electrode 14, the electrode 13 being eliminated; this diffusion forms a reservoir for charge carriers of which the level is aligned with that of the highest potential;

the second may be used when, contrary to the foregoing, a dissymmetry is created by a known technique in the charge-transfer direction by local overdoping (for example by ion implantation); in this case, the overdoping is omitted below the electrode 13.

The differential device described above thus samples the two input signals (E₁ and E₂) at the same instants (φ_(ECH2) =φ_(H) at the period T), the corresponding samples arriving at a common electrode (G_(L)) with a phase shift of T/2 which is introduced by the difference in the number of transfer electrodes respectively placed on each channel. By virtue of this arrangement, it is possible simultaneously to obtain automatic differentiation of the signals, because they arrive in phase opposition at the electrode (G_(L)) where they are read, and to avoid external maintenance of the signals for half a period which would be necessary if sampling were carried out with a relative delay of T/2 in each channel.

FIG. 5 shows a first application of the device according to the invention to a transversal charge-transfer filter using the technique of charge-coupled devices (CCD's).

It will be recalled that, in a CTD filter, the signal has to be sampled, passed through a delay line comprising a discrete number N of stages, extracted at the level of each stage and given a weighting coefficient h_(i) (1≦i≦N) dependent upon the required filtration, after which the signals thus produced are algebraically added to obtain the filtered signal.

In the interests of simplicity, FIG. 5 shows only the electrodes of the filter which are conventionally insulated from one another, being deposited on a semi-conductor substrate covered by an insulating layer. The filter comprises N=5 stages formed by 5 substantially parallel channels, the width of the channels varying with the weighting coefficients: it has the form h_(i) ·l, where:

h_(i) is the dimensionless coefficient 1≦i≦5

l is the unit width.

Accordingly, a quantity of charges proportional to the coefficient h_(i) circulates in each channel. Each channel comprises a stage (I₁ . . . I₅) for injecting charges into the channel, represented in the figure by a dotted-line block symbolising the diode D and the gates G_(EC) and G_(E) described above; an assembly of transfer electrodes alternately connected to the preceding potentials φ₁ and φ₂, their number being dependent upon the order of the channel and upon the sign of the required weighting coefficient. As in the device shown in FIG. 1, the gates G_(T) and G_(L) extend over all the channels, the first gate G_(T) being kept at the potential V_(G) and the second gate G_(L) being connected to the element L. Again as in FIG. 1, each channel comprises, after the gates G_(T) and G_(L), a transfer electrode followed by a charge removal diode (not shown).

It should be noted that in this figure, as in the following figures, a "transfer electrode" is understood to be a pair of two electrodes such as 11 and 12 or 23 and 24 in FIG. 1 connected to the same potential φ₁ or φ₂.

With regard to the delay imposed on the input signal in each channel, it is of course dependent upon the number of transfer electrodes which the channel in question comprises, two successive electrodes controlled respectively by φ₁ and φ₂ introducing a delay T. Accordingly, for each stage to impose an additional delay T in relation to the preceding stage, the corresponding channel must comprise two additional transfer electrodes. This is illustrated in FIG. 5 where the second channel for example comprises after the injection stage I₂ two electrodes (φ₂ and φ₁) more than the first channel which only comprises one (φ₁).

The sign of the weighting coefficients may be positive or negative. By applying the principle of the differential stage of FIG. 1, the signal E is injected in phase, that is to say at the same instant, in all the channels and an additional transfer electrode is added to the channels representing positive coefficients. In this way, the groups of charges corresponding to the coefficients of like sign are added together and subtracted from the groups of charges representing coefficients of opposite sign due to the fact that they rejoin the common electrodes G_(T) and G_(L) with a relative delay of T/2. Accordingly, the output signal S_(F) of the filter is obtained at the output of the block L.

An arrangement such as this has the following advantages over other known transversal filters:

on the one hand, it can be completely integrated on the same substrate, including the differential stages;

on the other hand, it avoids the extraction and output of the signal from the charge-transfer device before the sum signal S_(F) is obtained.

FIG. 6 shows another application of the device according to the invention to a transversal charge-transfer filter.

As in the preceding figure, only the electrodes of the filter are shown. In addition, the same coefficients as in FIG. 5 with the same number of stages (N=5) have been selected in the interests of simplicity.

In this case, the injection stage (I) is common to all the channels in the same way as the first transfer electrode controlled by the potential φ₁. However, the channels are insulated from one another, for example by insulating diffusions (lines 41 to 44 in the figure) which begin below the electrode φ₁ in order to obtain greater precision, as soon described.

The first channel of width h₁ ·l comprises, after electrodes G_(T) and G_(L), a transfer electrode φ₁ followed by a diode (not shown). In order to impose on the charges a delay T relative to the charges of the first channel, the second channel comprises, in addition to the electrode φ₁ common to all the channels and the gates G_(T) and G_(L), two additional transfer electrodes (φ₂ and φ₁) which are common to the four remaining channels, etc.

The various gates G_(L) are interconnected towards the reading block L to supply the output signal of the filter, the sign of weighting coefficients of the filter being obtained in the same way as in the device shown in FIG. 5 by a phase shift of T/2.

In this embodiment, it is possible if necessary to add a delay line to the filter. This delay line is formed by a certain number of pairs of transfer electrodes (φ₁, φ₂) common to all the channels and placed between the injection stage I and the transfer electrode below which the channels are separated.

FIG. 7 shows another application of the device according to the invention which enables filtering to be carried out with coefficients of very low value.

In the same way as before, FIG. 7 shows a filter with N channels (N=5) comprising an injection stage (I) and a first common transfer electrode (φ₁), the channels being separated below this electrode.

In this embodiment, all the channels have the same width (l), but are each subsequently divided into two parts (L⁺ and L⁻) proportional to (1+h_(k))/2 and (1-h_(k))/2, respectively, after (k-1) transfer stages (k≦N). Each channel then comprises a differential stage corresponding to that shown in FIG. 1. The part of width L⁺ undergoes an additional transfer before arriving at the gates G_(T) and G_(L), of which only the gate G_(L) is shown in the interest of simplicity. The gates G_(L) of all the channels are connected together to the reading block L to give the output signal S_(F).

In this embodiment, the width of the electrodes is greater, the lower the value of the coefficients with L_(k) ⁺ =L_(k) ⁻ =l/2 for h_(k) =0. Accordingly, this structure is particularly advantageous for filters having coefficients of very low value on account of the technological impossibility of forming very narrow channel widths (less than 5 um for example).

The filters described in the preceding figures may be used in particular for the correction which is necessary at the output end of a charge-transfer delay line.

As already known, the attenuation of a signal propagated in a line such as this is an increasing function of the frequency of the signal, this attenuation being greater, the higher the clock frequency of the line, which constitutes a limit to the increase of this frequency. In order to overcome this drawback, it is standard practice for the delay line to be followed by a filter the function of which is to render the attenuation uniform for all the frequencies of the signal up to half the clock frequency.

FIG. 8 shows one application of the charge-transfer filter according to the invention to such a correction. This application has the advantage of enabling the delay line and the corrective filter to be integrated on the same substrate.

FIG. 8 shows by way of example one end of a charge-transfer delay line 50 successively comprising the last two transfer electrodes (φ₂ and φ₁), an output gate (G_(s)) parallel with the preceding electrodes, a diode D₁, a transfer electrode (φ₁) and a second diode D₂. The output signal (S_(R)) of the line is obtained at the diode D₁ and feeds the gate of an MOS-transistor 52. A relatively high voltage, for example the preceding voltage V_(DD), biasses the diode D₂ and feeds one of the terminals of the MOS-transistor 52, the other terminal (53) of this transistor being connected to earth through a rheostat R.

The device shown in FIG. 8 comprises a filter 51 similar to the filter shown in FIG. 5, for example having three coefficients (-a, b=1, -a), but with channels of identical width. The second channel which alone represents a positive coefficient imposes a phase shift of T+T/2 in relation to the first channel. At its injection stage (I₂), it receives the signal available at the point 53 which represents the filtering coefficient equal to 1. The third channel has a phase shift of 2 T in relation to the first channel. At its injection stage (I₃), it receives the same signal as the first channel supplied by the slide 54 of the rheostat R which represents the filtering coefficient a.

One of the advantages of this embodiment is that the adjustment of the rheostat R enables the value of the coefficient a, i.e. the response of the filter, to be adjusted.

FIG. 9 shows a variant of the device illustrated in the preceding figure which may be used when the coefficients (a, b) of the corrective filter are known in advance and which provides for a more compact construction.

FIG. 9 shows the last four transfer electrodes (φ₂, φ₁, φ₂, φ₁) of a charge-transfer delay line of which the channel has a width l. Under the last electrode φ₁, the channel is divided into three channels of which the widths are, respectively, a.l, b.l, and a.l with 2a+b=1, so as to form a filter similar to that shown in FIG. 6. In the same way as before, the second channel represents a positive filtering coefficient, whereas the other two represent negative coefficients and, hence, have a phase shift of T/2 in relation to the second channel.

As in FIG. 6, the gates G_(L) of each channel (G_(L1), G_(L2) and G_(L3)) are joined together and connected to the block L to supply the delayed and filtered signal.

One advantage of this embodiment is that there is no need for the signal to be extracted between the delay stage and the correction stage.

In the same way as shown in FIGS. 8 and 9, the filter shown in FIG. 7 may also be used in combination with a delay line for correcting the delayed signal. 

What is claimed is:
 1. A differential device using charge-transfer devices for forming the difference between two electrical input signals, comprising:a semi-conductor substrate in which electrical charges are capable of being transferred; at least two electrically insulated channels formed in said substrate which respectively receive said two input signals; first means for forming at the same instants in each of the channels groups of electrical charges representing samples of said input signals; at least one electrode common to said two channels; second means comprising transfer electrodes deposited on said substrate substantially parallel to one another, to which are applied periodic charge-transfer signals (φ₁, φ₂) controlling said transfer of charges, said second means propagating said groups of charges in each of said channels towards said common electrode with a relative delay from one channel to the other equal to half the period (T/2) of said charge-transfer signals; means for extracting from said common electrode an output signal which is proportional to the difference between the two input signals.
 2. A differential device as claimed in claim 1, wherein said extraction means apply a constant potential (V_(P)) to said common electrode on the arrival of the groups of charges in the first channel under this electrode and, then, isolate said common electrode and read its potential which results from said constant potential (V_(P)) and the quantity of charges present under said common electrode on the arrival of the group of charges in the second channel and on the departure of the group of charges existing in the first channel.
 3. A differential device as claimed in claim 2, wherein said extraction means comprise first and second transistors of the MOS-type; said first MOS-transistor being connected on the one hand to said common electrode and on the other hand to said constant potential (V_(P)), said first transistor being further controlled by a first potential (φ_(P)) of the same period (T) as said charge-transfer signals (φ₁, φ₂), but phase-shifted in relation to them in such a way that said common electrode is brought to said constant potential (V_(P)) on the arrival of the groups of charges in said first channel; said second MOS-transistor being connected by one of its terminals to said common electrode and, at its other terminal, supplies the output signal (S) of the device, said second transistor being controlled by a second potential (φ_(ECH1)) of the same period (T) as, but in phase opposition to, said first potential (φ_(P)).
 4. A differential device as claimed in claim 1, wherein for each channel, said first means are formed by a diode formed in said substrate, first and second electrodes, substantially parallel with said transfer electrodes, the input signal (E) of the channel being applied to said diode, said first electrode being controlled by a periodic potential (φ_(ECH2)) which is identical for said two channels and which has the same period (T) as said transfer signals (φ₁, φ₂), enabling the input signal (E) to be sampled.
 5. A differential device as claimed in claim 1, wherein each transfer electrode is divided into two electrodes controlled by the same transfer signal, said divided electrodes being deposited on said substrate by way of layers of electrically insulating materials differing from one another in thickness so that the transfer of charges in said substrate can only take place in one direction.
 6. A differential device as claimed in claim 1, wherein said common electrode is preceded by a second common electrode kept at a constant potential so that the transfer of charges in said substrate can only take place towards said common electrode.
 7. A differential device, according to claim 1, to be included in a filter, said filter using the transfer of charges in a semi-conductor for filtering an input signal by means of a number (N) of weighting coefficients, said device comprising a plurality of said insulated channels adjacent to one another and equal to the number of weighting coefficients (N) of said filter, the number of said transfer electrodes in each of said channels being such that, the groups of charges passing respectively through two adjacent channels representing coefficients of like sign, are phase-shifted relative to one another by the period (T) of said transfer signals and, that the groups of charges passing respectively through two adjacent channels representing coefficients of opposite sign are phase-shifted by an odd number of half-periods (T/2) of the transfer signals.
 8. A device as claimed in claim 7, wherein said channels are substantially parallel to one another, their width defining the magnitude of the corresponding filtering coefficient, each channel comprising means for sampling said input signal of the filter and said common electrode extending over all the channels.
 9. A device as claimed in claim 7, wherein said channels are substantially parallel to one another, their width defining the magnitude of the corresponding filtering coefficient, said means for sampling said input signal of the filter being common to al the channels and said common electrode being formed by as many electrodes as there are channels electrically connected to one another.
 10. A device as claimed in claim 7, wherein said channels are substantially parallel to one another and equal in width, said means for sampling said input signal of the filter being common to all the channels, each of the channels being divided into two parts of which the width ratio represents the corresponding filtering coefficient, said common electrode being formed by as many electrodes as there are channel sections electrically connected to one another.
 11. A device as claimed in claim 9 or 10, wherein the first transfer electrode, which is situated on the path followed by the charges after said sampling means, is also common to all the channels, the electrical insulation of the channels beginning below this electrode and being formed by insulating diffusions.
 12. A delay line using charge-transfer devices, comprising the device as claimed in claim
 7. 13. A delay line as claimed in claim 12, wherein said the device comprises a plurality of channels of equal width disposed substantially parallel to one another, each channel comprising means for sampling the signal applied to the channel, said common electrode extending over all the channels, the delayed signal being applied to the channels of the filter through resistive elements the resistance value of which defines the value of the filtering coefficient of the corresponding channel.
 14. A delay line using charge transfer devices as claimed in claim 9 or 10, comprising transfer electrodes which extend over all the channels and which are placed in the path followed by the charges after the sampling ans. 